Within computing systems, an interrupt can be considered a signal that receives the attention of a processor and that is usually generated when input/output (I/O) activity is required. For example, interrupts may be generated when a key on the keyboard is pressed or when the mouse or other pointing device is moved. Other types of interrupts are generated by network controllers, storage devices, video devices, and other kinds of hardware devices. Also core/thread specific interrupts like firmware only interrupts may be generated on computer systems.
Interrupt handling for floating interrupts, i.e. interrupts that are presented to multiple processors in a computer system but only need to be handled by one processor, or interrupts that require only firmware intervention but not intervention of the customer program, creates processing overhead and impacts the performance of single-threaded customer workload, because the processor has to exit the customer workload processing, perform a context switch to enter the interrupt handler, analyze the interrupt condition, only to find out that the condition has already been handled by another processor.
Operating systems can reduce the impact on workload of the processors of a multiprocessor system by processing interrupt requests by only enabling a subset of the processors for interrupt handling, but as long as there is more than one processor enabled for interrupts which only one processor needs to handle, there is overhead in the computer system.
In case of a single threaded program only a main thread is setup for a guest and can execute a customer program, whereas another, secondary, thread stays in host mode and is only allowed to handle some interrupts (like quiesce interrupts) which need to be executed by all threads, independent if they are running customer code or not. Therefore, all interrupts which are enabled via PSW masks (like I/O interrupts) and/or control registers will interrupt the main thread running the customer program.
For example, a guest I/O interrupt is sent to all cores and threads in the system. Depending on HW/FW interrupt controls, among other conditions, the interrupt is made pending or not.
If it is made pending, a firmware interrupt handler gets invoked on each enabled thread. It is the responsibility of the firmware interrupt handler to make sure that only one thread presents the interrupt to software. This is done by sending a sysop to reset the interrupt indication on all cores. The core which first has reset the interrupt indication provided by hardware, is the one which has to handle the interrupt and present it to the software, all other cores exit the firmware interrupt handler without doing anything else, but have wasted execution time.